A method and apparatus for performing normalisation of floating point numbers using a much smaller width register than would normally be required for the data operands which can be processed. As the registers are smaller, the number of circuits required to achieve the normalisation is reduced, resulting in a decrease in the chip area required to perform such operation. The normalisation circuitry was streamlined to efficiently operate on the more prevalent type of data being presented to the floating point unit. Data types and/or operations which statistically occur less frequently require multiple cycles of the normalisation function. It was found that for the more prevalent data types and/or operations, the width of the registers required was substantially less than the width required for the less frequent data types and/or operations. Instead of expanding the register width to accommodate these lesser occurrences, the data is broken into smaller portions and normalised using successive cycles of the normalisation circuitry. Thus, by sacrificing speed for the lesser occurring events, a significant savings was realised in the number of circuits required to implement normalisation. As the slower speed operations occur infrequently, the overall performance of the normalisation function is minimally impacted. Thus, considerable savings in integrated circuit real estate is achieved with minimal impact to the overall throughput of the system.