A multi-layer Z-technology module (20) having a two dimensional photodetector (24) mosaic is disclosed, in which the function of A/D signal conversion is accomplished in each on-chip channel. In order to satisfy the power and real estate limitations of the modules, a substantial part of the A/D conversion circuitry is located off-chip. Two devices are required in each channel on each chip (22), a precision comparator, and a storage register. These may be combined with an off-chip analog ram, and an off-chip digital ramp. Certain on-chip performance enhancements are disclosed, which can operate either in the analog mode or the digital mode. One such enhancement is compensating for the voltage offset of each comparator. Another enhancement is reducing the duty cycle of each precision comparator, in order to lower power requirements.