A semiconductor memory device is installed in one of a single data output and a parallel data output model, and a single data output unit (DO15) associated with a first diagnostic unit (23) and a parallel data output unit (DO11 to DO14) with a second diagnostic unit (ENR11 to ENR14) are incorporated in the semiconductor memory device for selective usage, wherein a first number of data bits read out from memory cells are subjected to diagnosis for supplying a plurality of first diagnostic signals in the signal data output model, however, the first diagnostic signals are further subjected to diagnosis for producing a single second diagnostic signal in the parallel data output model without supplying the first diagnostic signals to the outside thereof so that the internal wiring arrangement (D19 to D22 and R11 to R14, or W1 to W8) is simplified and occupies a small amount of real estate.